Low energy and small switch area usage are two of the important design objectives in FPGA global routing architecture design. This paper presents an improved MCF model based CAD ļ...
Yuanfang Hu, Yi Zhu, Michael Bedford Taylor, Chung...
We present a new gate-level approach to current simulation. We use a symbolic model of current pulses that takes accurately into account the dependence on the switching conditions...
Alessandro Bogliolo, Luca Benini, Giovanni De Mich...
AbstractāInput buffered switch architecture has become attractive for implementing high performance routers and expanding use of the Internet sees an increasing need for quality ...
Abstractā This paper presents circuits that enable dynamic voltage and frequency scaling (DVFS) for ļ¬negrained chip multi-processors to reduce both dynamic and leakage power di...
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for diļ¬erent circuit elements and unused circuit elements can be powe...