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VLSID
2006
IEEE
156views VLSI» more  VLSID 2006»
14 years 7 months ago
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
Jungsub Kim, Mary Jane Irwin, Narayanan Vijaykrish...
CISIS
2009
IEEE
14 years 2 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
14 years 1 months ago
Transistor-Specific Delay Modeling for SSTA
SSTA has received a considerable amount of attention in recent years. However, it is a general rule that any approach can only be as accurate as the underlying models. Thus, varia...
Brian Cline, Kaviraj Chopra, David Blaauw, Andres ...
CISS
2007
IEEE
14 years 1 months ago
On Capacity of Automatic Target Recognition Systems Under the Constraint of PCA-Encoding
Limiting capabilities of practical recognition systems are determined by a variety of factors that include source encoding techniques, quality of images, complexity of underlying ...
Xiaohan Chen, Natalia A. Schmid
IPPS
2007
IEEE
14 years 1 months ago
Advanced Shortest Paths Algorithms on a Massively-Multithreaded Architecture
We present a study of multithreaded implementations of Thorup’s algorithm for solving the Single Source Shortest Path (SSSP) problem for undirected graphs. Our implementations l...
Joseph R. Crobak, Jonathan W. Berry, Kamesh Maddur...