98 search results - page 2 / 20 » The scaling of interconnect buffer needs |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
CSREAESA
2004
13 years 9 months ago
2004
Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as fast as the device...
HOTI
2008
IEEE
14 years 2 months ago
2008
IEEE
—We present OCDIMM (Optically Connected DIMM), a CPU-DRAM interface that takes advantage of multiwavelength optical interconnects. We show that OCDIMM has at least three key bene...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
As technology advances, the interconnect delay among modules plays dominant role in chip performance. Buffer insertion, as a traditional approach to reduce wire delay in 2D ICs, i...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...