115 search results - page 16 / 23 » The synthesis of cyclic combinational circuits |
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
ISSS
2002
IEEE
14 years 18 days ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
CODES
2009
IEEE
14 years 2 months ago
2009
IEEE
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
FPL
1999
Springer
13 years 12 months ago
1999
Springer
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...