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ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
14 years 3 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
ASPDAC
1999
ACM
98views Hardware» more  ASPDAC 1999»
14 years 2 months ago
Generation of Interpretive and Compiled Instruction Set Simulators
Abstract Due to the large variety of di erent embedded processor types, retargetable software development tools, such as compilers and simulators, have received attention recently....
Rainer Leupers, Johann Elste, Birger Landwehr
RTAS
2005
IEEE
14 years 3 months ago
Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach
Alberto Ferrante, Giuseppe Piscopo, Stefano Scalda...
PPPJ
2004
ACM
14 years 3 months ago
A dynamic compiler for embedded Java virtual machines
A new acceleration technology for Java embedded virtual machines is presented in this paper. Based on the selective dynamic compilation technique, this technology addresses the J2...
Mourad Debbabi, Abdelouahed Gherbi, Lamia Ketari, ...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
14 years 2 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli