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ISSS
1997
IEEE
109views Hardware» more  ISSS 1997»
13 years 11 months ago
Reducing the Complexity of ILP Formulations for Synthesis
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases. There exists some tools that give an o...
Anne Mignotte, Olivier Peyran
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 11 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ERSA
2009
129views Hardware» more  ERSA 2009»
13 years 4 months ago
Data path Configuration Time Reduction for Run-time Reconfigurable Systems
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...
CCE
2005
13 years 6 months ago
New rigorous one-step MILP formulation for heat exchanger network synthesis
In this paper, a rigorous MILP formulation for grass-root design of heat exchanger networks is developed. The methodology does not rely on traditional supertargeting followed by n...
Andrés F. Barbaro, Miguel J. Bagajewicz
EUROGRAPHICS
2010
Eurographics
13 years 8 months ago
Continuum Traffic Simulation
We present a novel method for the synthesis and animation of realistic traffic flows on large-scale road networks. Our technique is based on a continuum model of traffic flow we e...
Jason Sewall, David Wilkie, Paul Merrell, Ming C. ...