165 search results - page 29 / 33 » Thread-Shared Software Code Caches |
ASPLOS
1996
ACM
14 years 2 months ago
1996
ACM
This paper analyzes and quantifies the locality characteristics of numerical loop nests in order to suggest future directions for architecture and software cache optimizations. Si...
SCOPES
2004
Springer
14 years 4 months ago
2004
Springer
For mobile embedded systems, the energy consumption is a limiting factor because of today’s battery capacities. Besides the processor, memory accesses consume a high amount of en...
ISCA
2010
IEEE
14 years 3 months ago
2010
IEEE
Light-weight, flexible access control, which allows software to regulate reads and writes to any granularity of memory region, can help improve the reliability of today’s multi...
CHES
2007
Springer
14 years 4 months ago
2007
Springer
Abstract. This paper discusses the state-of-the-art fast software implementation of block ciphers on Intel’s new microprocessor Core2, particularly concentrating on “bitslice i...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...