248 search results - page 8 / 50 » Threaded Multiple Path Execution |
HPCA
2007
IEEE
14 years 9 months ago
2007
IEEE
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-lat...
ISCA
1998
IEEE
14 years 26 days ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
SIGMOD
2011
ACM
12 years 11 months ago
2011
ACM
Conventional OLTP systems assign each transaction to a worker thread and that thread accesses data, depending on what the transaction dictates. This thread-to-transaction work ass...
ICRA
2010
IEEE
13 years 7 months ago
2010
IEEE
— The DPC algorithm developed in our previous work is an efficient way of computing optimal trajectories for multiple robots in a distributed fashion with timeparameterized cons...
ISCAPDCS
2004
13 years 10 months ago
2004
Hyperthreaded(HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by ex...