This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Learning a sequence classifier means learning to predict a sequence of output tags based on a set of input data items. For example, recognizing that a handwritten word is "ca...
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
This paper addresses design agendas in Human-Computer Interaction and neighbouring fields motivated by the mixing of areas that were mostly kept separate until recently, such as m...
Carlo Jacucci, Giulio Jacucci, Ina Wagner, Thomas ...
Several new Complex Event Processing (CEP) engines have been recently released, many of which are intended to be used in performance sensitive scenarios - like fraud detection, tr...
Marcelo R. N. Mendes, Pedro Bizarro, Paulo Marques