132 search results - page 8 / 27 » Three-Dimensional Cache Design Exploration Using 3DCacti |
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
SLP
1997
13 years 9 months ago
1997
We demonstrate the bene ts of instruction-set simulation in the evaluation of a parallel programming system, Penny. The simulator is a reliable tool in exploring design alternativ...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Current trends in processor design are pointing to deeper and wider pipelines and superscalar architectures. The efficient use of these resources requires speculative execution, ...
BMCBI
2007
13 years 7 months ago
2007
Background: Macromolecular visualization as well as automated structural and functional annotation tools play an increasingly important role in the post-genomic era, contributing ...