166 search results - page 4 / 34 » Through Silicon Vias as Enablers for 3D Systems |
SLIP
2009
ACM
14 years 1 months ago
2009
ACM
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
ISPD
2011
ACM
12 years 10 months ago
2011
ACM
Three-dimensional ICs promise to significantly extend the scale of system integration and facilitate new-generation electronics. However, progress in commercial 3D ICs has been s...
CORR
2008
Springer
13 years 7 months ago
2008
Springer
Emerging 3D chips stacking and MEMS/Sensors packaging technologies are using DRIE (Deep Reactive Ion Etching) to etch Through-Silicon Via (TSV) for advanced interconnections. The ...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— Heat removal and power delivery are two major reliability concerns in the 3D stacked IC technology. Liquid cooling based on micro-fluidic channels is proposed as a viable solu...