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» Through Silicon Vias as Enablers for 3D Systems
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IJRR
2010
130views more  IJRR 2010»
13 years 5 months ago
CAD Model-based Tracking and 3D Visual-based Control for MEMS Microassembly
This paper investigates sequential robotic microassembly for the construction of 3D micro-electro-mechanical systems (MEMS) structures using a 3D visual servoing approach. The pre...
Brahim Tamadazte, Éric Marchand, Sounkalo D...
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
14 years 2 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
ETS
2010
IEEE
174views Hardware» more  ETS 2010»
13 years 8 months ago
Test-architecture optimization for TSV-based 3D stacked ICs
Testing of 3D stacked ICs (SICs) is becoming increasingly important in the semiconductor industry. In this paper, we address the problem of test architecture optimization for 3D s...
Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakr...
TOG
2012
253views Communications» more  TOG 2012»
11 years 10 months ago
Exploring collections of 3D models using fuzzy correspondences
Large collections of 3D models from the same object class (e.g., chairs, cars, animals) are now commonly available via many public repositories, but exploring the range of shape v...
Vladimir G. Kim, Wilmot Li, Niloy J. Mitra, Stephe...
DAC
2011
ACM
12 years 7 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...