6111 search results - page 135 / 1223 » Time, Hardware, and Uniformity |
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
— State of the art statistical timing analysis (STA) tools often yield less accurate results when timing variables become correlated due to global source of variations and path r...
DATE
2008
IEEE
14 years 2 days ago
2008
IEEE
In this paper, we propose a simulation-based methodology for worst-case response time estimation of distributed realtime systems. Schedulability analysis produces pessimistic uppe...
ASYNC
2002
IEEE
14 years 3 months ago
2002
IEEE
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
ACSD
2006
IEEE
14 years 4 months ago
2006
IEEE
Timed Automata (TA) and Time Petri Nets (TPN) are two well-established formal models for real-time systems. Recently, a linear transformation of TA to TPNs preserving reachability...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...