Variability in process parameters is making accurate timing analysis of nano-scale integrated circuits an extremely challenging task. In this paper, we propose a new algorithm for...
Scan chain insertion can have large impact on routability, wirelength and timing. We propose a routing-driven and timing-aware methodology for scan insertion with minimum wireleng...
We present an algorithm for solving a general min-cut, twoway partitioning problem subject to timing constraints. The problem is formulated as a constrained programming problem an...
This paper reports on a set of experiments that measure the amount of CPU processing needed to decode MPEGcompressed video in software. These experiments were designed to discover...
Andy C. Bavier, Allen Brady Montz, Larry L. Peters...
With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Ma...