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ICCAD
2002
IEEE
143views Hardware» more  ICCAD 2002»
14 years 4 months ago
A Markov chain sequence generator for power macromodeling
In macromodeling-based power estimation, circuit macromodels are created from simulations of synthetic input vector sequences. Fast generation of these sequences with all possible...
Xun Liu, Marios C. Papaefthymiou
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
13 years 12 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar
ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
13 years 12 months ago
A Language for Describing Predictors and Its Application to Automatic Synthesis
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
Joel S. Emer, Nicholas C. Gloy
ICCAD
1996
IEEE
141views Hardware» more  ICCAD 1996»
13 years 12 months ago
An observability-based code coverage metric for functional simulation
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
14 years 4 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku