769 search results - page 107 / 154 » Timed Circuit Synthesis Using Implicit Methods |
DAC
1997
ACM
13 years 12 months ago
1997
ACM
We present a novel technique CLIP for optimizing both the height and width of CMOS cell layouts in the two-dimensional (2D) style. CLIP is based on integer-linear programming (ILP...
ICCAD
1997
IEEE
13 years 12 months ago
1997
IEEE
We present a novel method for state minimization of incompletely-specified finite state machines. Where classic methods simply minimize the number of states, ours directly addre...
RSP
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
VTS
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
INTERSPEECH
2010
13 years 2 months ago
2010
This paper presents a new method of extracting LF model based parameters using a spectral model matching approach. Strategies are described for overcoming some of the known diffic...