769 search results - page 118 / 154 » Timed Circuit Synthesis Using Implicit Methods |
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
DSN
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we introduce a novel metric that can quantitatively measure the practical effectiveness (i.e. anonymity) of all anonymous networks in the presence of timing attack....
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
FORTE
2000
13 years 9 months ago
2000
The adventof multipoint(multicast-based) applications and the growth and complexity of the Internet has complicated network protocol design and evaluation. In this paper, we prese...
DATE
2000
IEEE
14 years 3 days ago
2000
IEEE
This paper presents a method for redundancy identification (RID) using multi-node logic implications. The algorithm discovers a large number of direct and indirect implications b...