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» Timed Circuit Synthesis Using Implicit Methods
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DATE
1999
IEEE
120views Hardware» more  DATE 1999»
14 years 2 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
TSP
2008
116views more  TSP 2008»
13 years 10 months ago
Computation of Delay-Free Nonlinear Digital Filter Networks: Application to Chaotic Circuits and Intracellular Signal Transducti
Abstract--A method for the computation of nonlinear digital filter networks containing delay-free loops is proposed. By preserving the topology of the network this method permits t...
Federico Fontana, Federico Avanzini
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 3 months ago
Statistical static timing analysis using Markov chain Monte Carlo
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
Yashodhan Kanoria, Subhasish Mitra, Andrea Montana...
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 2 months ago
Safe Delay Optimization for Physical Synthesis
-- Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the final result, often by neg...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
ASPDAC
1995
ACM
85views Hardware» more  ASPDAC 1995»
14 years 1 months ago
High-level synthesis scheduling and allocation using genetic algorithms
In this article a scheduling method is presented which is capable of allocating supplementary resources during scheduling. This makes it very suitable in synthesis strategies base...
Marc J. M. Heijligers, L. J. M. Cluitmans, Jochen ...