769 search results - page 48 / 154 » Timed Circuit Synthesis Using Implicit Methods |
TCAD
2008
13 years 10 months ago
2008
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
Carry Save Adder (CSA) trees are commonly used for high speed implementation of multi-operand additions. We present a method to reduce the number of the adders in CSA trees by ext...
VLSID
2003
IEEE
14 years 10 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
ACSD
2005
IEEE
14 years 4 months ago
2005
IEEE
Asynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed processes in digital systems. In previous work, syst...
ASPDAC
2006
ACM
14 years 4 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...