769 search results - page 49 / 154 » Timed Circuit Synthesis Using Implicit Methods |
DATE
2010
IEEE
14 years 3 months ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
ISPD
2010
ACM
14 years 5 months ago
2010
ACM
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
MICCAI
2003
Springer
14 years 11 months ago
2003
Springer
In this paper we present a method for simulating bleeding in a virtual reality hysteroscopic simulator for surgical training. The simulated bleeding is required to be visually app...