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VTS
2007
IEEE
71views Hardware» more  VTS 2007»
14 years 4 months ago
Optimizing Test Length for Soft Faults in DRAM Devices
: Soft faults in DRAMs are faults that do not get sensitized directly after an operation is performed, but require a time to pass before the fault can be detected. Tests developed ...
Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
14 years 3 months ago
Time Domain Multiplexed TAM: Implementation and Comparison
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
Zahra Sadat Ebadi, André Ivanov
IEAAIE
2010
Springer
13 years 8 months ago
Testing for Heteroskedasticity of the Residuals in Fuzzy Rule-Based Models
In this paper, we propose a new diagnostic checking tool for fuzzy rule-based modelling of time series. Through the study of the residuals in the Lagrange Multiplier testing framew...
José Luis Aznarte M., José M. Ben&ia...
ASPDAC
2001
ACM
104views Hardware» more  ASPDAC 2001»
14 years 1 months ago
Processor-programmable memory BIST for bus-connected embedded memories
Abstract--We present a processor-programmable built-in selftest (BIST) scheme suitable for embedded memory testing in the system-on-a-chip (SOC) environment. The proposed BIST circ...
Ching-Hong Tsai, Cheng-Wen Wu
CSSC
2008
75views more  CSSC 2008»
13 years 10 months ago
Statistical Certification of Software Systems
Common software release procedures based on statistical techniques try to optimise the trade-off between further testing costs and costs due to remaining errors. We propose new so...
Alessandro Di Bucchianico, Jan Friso Groote, Kees ...