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ICAC
2009
IEEE
14 years 5 months ago
Run-time correlation engine for system monitoring and testing
We present an approach and implementation for run-time correlation of large volumes of log data and symptom matching of know issues in the context of large enterprise applications...
Viliam Holub, Trevor Parsons, Patrick O'Sullivan, ...
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
14 years 2 months ago
Functional Test Generation for Full Scan Circuits
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
Irith Pomeranz, Sudhakar M. Reddy
ICCD
2006
IEEE
116views Hardware» more  ICCD 2006»
14 years 7 months ago
RTL Scan Design for Skewed-Load At-speed Test under Power Constraints
This paper discusses an automated method to build scan chains at the register-transfer level (RTL) for powerconstrained at-speed testing. By analyzing a circuit at the RTL, where ...
Ho Fai Ko, Nicola Nicolici
ICMCS
2006
IEEE
148views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Hierarchical Load Testing Architecture using Large Scale Virtual Clients
In this work, we develop a hierarchical load testing architecture using large scale virtual clients to reduce the testing time and ensure the stability of the server for distribut...
Bum Lim, Jin Kim, Kwang Shim
ITC
2003
IEEE
93views Hardware» more  ITC 2003»
14 years 3 months ago
On Reducing Wrapper Boundary Register Cells in Modular SOC Testing
Motivated by the increasing area and performance overhead caused by wrapping the embedded cores for modular SOC testing, this paper proposes a solution for reducing the number of ...
Qiang Xu, Nicola Nicolici