4306 search results - page 86 / 862 » Timed Testing with TorX |
IESS
2007
Springer
14 years 1 months ago
2007
Springer
: The performance of feasibility tests is crucial in many applications. When using feasibility tests online only a limited amount of analysis time is available. Run-time efficiency...
GI
2007
Springer
14 years 1 months ago
2007
Springer
: In addition to the growing complexity of software systems, test effort takes increasing amounts of time and correspondingly more money. Testing costs may be reduced without compr...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
— In this paper we investigate an effective approach to construct a linear decompression network in the multiple scan chain architecture. A minimal pin architecture, complemented...
VTS
2002
IEEE
14 years 18 days ago
2002
IEEE
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
External pins for test are precious hardware resources because this number is strongly restricted. Cores are tested via test access mechanisms (TAMs) such as a test bus architectu...