176 search results - page 1 / 36 » Timed Verification of Asynchronous Circuits |
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
FORMATS
2006
Springer
13 years 10 months ago
2006
Springer
Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...
AC
2002
Springer
13 years 6 months ago
2002
Springer
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
ASYNC
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...