176 search results - page 7 / 36 » Timed Verification of Asynchronous Circuits |
ICCAD
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzT...
ASYNC
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
ASYNC
1997
IEEE
13 years 11 months ago
1997
IEEE
Wediscuss response timeproperties of linear arrays and tree-like arrays of cells with various handshake communication behaviours. The response times of a networkare the delays bet...
CORR
2004
Springer
13 years 7 months ago
2004
Springer