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HPCA
2003
IEEE
14 years 8 months ago
TCP: Tag Correlating Prefetchers
Although caches for decades have been the backbone of the memory system, the speed gap between CPU and main memory suggests their augmentation with prefetching mechanisms. Recentl...
Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
HPCA
2003
IEEE
14 years 8 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
POPL
2005
ACM
14 years 8 months ago
Transition predicate abstraction and fair termination
on Predicate Abstraction and Fair Termination Andreas Podelski Andrey Rybalchenko Max-Planck-Institut f?ur Informatik Saarbr?ucken, Germany Predicate abstraction is the basis of m...
Andreas Podelski, Andrey Rybalchenko
STOC
2005
ACM
164views Algorithms» more  STOC 2005»
14 years 8 months ago
Cooperative asynchronous update of shared memory
The Write-All problem for an asynchronous shared-memory system has the objective for the processes to update the contents of a set of shared registers, while minimizing the mber o...
Bogdan S. Chlebus, Dariusz R. Kowalski
STOC
2004
ACM
158views Algorithms» more  STOC 2004»
14 years 8 months ago
Collective asynchronous reading with polylogarithmic worst-case overhead
The Collect problem for an asynchronous shared-memory system has the objective for the processors to learn all values of a collection of shared registers, while minimizing the tot...
Bogdan S. Chlebus, Dariusz R. Kowalski, Alexander ...
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