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» Timing analysis in high-level synthesis
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ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
14 years 20 hour ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
14 years 1 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
CHARME
1995
Springer
120views Hardware» more  CHARME 1995»
13 years 11 months ago
Timing analysis of asynchronous circuits using timed automata
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
Oded Maler, Amir Pnueli
ICCAD
2006
IEEE
155views Hardware» more  ICCAD 2006»
14 years 4 months ago
Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design
Abstract— Chip-package thermal analysis is necessary for the design and synthesis of reliable, high-performance, low-power, compact integrated circuits (ICs). Many methods of IC ...
Yonghong Yang, Changyun Zhu, Zhenyu (Peter) Gu, Li...
DAC
1997
ACM
13 years 12 months ago
System-Level Synthesis of Low-Power Hard Real-Time Systems
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
Darko Kirovski, Miodrag Potkonjak