290 search results - page 7 / 58 » Timing analysis in high-level synthesis |
GW
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. The work described in this abstract presents a roadmap towards the creation and specification of a virtual humanoid capable of performing expressive gestures in real tim...
DATE
1999
IEEE
14 years 14 hour ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
VLSID
2006
IEEE
14 years 1 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
IJVR
2006
13 years 7 months ago
2006
In this paper, we will present an overview of existing research in the vast area of IVH systems. We will also present our ongoing work on improving the expressive capabilities of I...
CORR
2006
Springer
13 years 7 months ago
2006
Springer
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...