37 search results - page 3 / 8 » Timing analysis in presence of supply voltage and temperatur... |
ICCAD
2003
IEEE
13 years 12 months ago
2003
IEEE
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
ISVLSI
2006
IEEE
14 years 21 days ago
2006
IEEE
— The effects of parameter variations and crosstalk noise on the clock signal propagating along an H-tree clock distribution network are investigated in this paper. In particular...
TIM
2010
13 years 1 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
ISVLSI
2002
IEEE
13 years 11 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
DAC
2004
ACM
14 years 7 months ago
2004
ACM
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...