188 search results - page 15 / 38 » Timing-driven optimization using lookahead logic circuits |
FPGA
1997
ACM
14 years 2 months ago
1997
ACM
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
ICCD
2005
IEEE
14 years 7 months ago
2005
IEEE
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
DAC
2004
ACM
14 years 11 months ago
2004
ACM
Reversible quantum logic plays an important role in quantum computing. In this paper, we propose an approach to optimally synthesize quantum circuits by symbolic reachability anal...
IOLTS
2003
IEEE
14 years 3 months ago
2003
IEEE
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
GECCO
2004
Springer
14 years 3 months ago
2004
Springer
This article summarizes two experiments utilizing building blocks to find analog electronic circuits on a CMOS Field Programmable Transistor Array (FPTA). The FPTA features 256 pr...