120 search results - page 5 / 24 » Timing-driven placement for FPGAs |
IFIP
1999
Springer
13 years 12 months ago
1999
Springer
In this paper we describe Frontier, an FPGA placement system that uses design macro-blocks in conjuction with a series of placement algorithms to achieve highly-routable and high-...
DAC
2003
ACM
14 years 29 days ago
2003
ACM
This paper describes a new force directed global placement algorithm that exploits and extends techniques from two leading placers, Force-directed [12] [26] and Mongrel [22]. It c...
IPPS
2003
IEEE
14 years 29 days ago
2003
IEEE
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
EH
2004
IEEE
13 years 11 months ago
2004
IEEE
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...