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107
Voted
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
15 years 8 months ago
Fast configurable-cache tuning with a unified second-level cache
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
ISCAS
2006
IEEE
95views Hardware» more  ISCAS 2006»
15 years 8 months ago
Vertex cache of programmable geometry processor for mobile multimedia application
Vertex cache of programmable geometry processor The proposed architecture of vertex cache is divided into is proposed and implemented. The proposed vertex cache is pre-TnL vertex c...
Kyusik Chung, Chang-Hyo Yu, Lee-Sup Kim
MSS
1999
IEEE
203views Hardware» more  MSS 1999»
15 years 6 months ago
Improved Adaptive Replacement Algorithm for Disk-Caches in HSM Systems
With an ever increasing amount of data to store, hierarchical storage management (HSM) systems must still use tape for tertiary storage. A disk cache is used to reduce the access ...
Ulrich Hahn, Werner Dilling, Dietmar Kaletta
139
Voted
DANTE
1999
IEEE
119views Database» more  DANTE 1999»
15 years 6 months ago
A Semantic Caching Method Based on Linear Constraints
Because performance is a crucial issue in database systems, data caching techniques have been studied in database research field, especially in client-server databases and distrib...
Yoshiharu Ishikawa, Hiroyuki Kitagawa
HIPC
2007
Springer
15 years 8 months ago
Direct Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors
Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed...
Alberto Ros, Manuel E. Acacio, José M. Garc...