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DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 2 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha
BCSHCI
2008
13 years 9 months ago
Walk 2 Win: towards designing a mobile game for elderly's social engagement
In this paper we describe a user-centered approach to designing and evaluating a socially interactive mobile game for the elderly. The objective of the game is to encourage the el...
Omar Mubin, Suleman Shahid, Abdullah Al Mahmud
VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
14 years 1 months ago
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
HICSS
2007
IEEE
181views Biometrics» more  HICSS 2007»
14 years 1 months ago
A Methodology to Evaluate Agent Oriented Software Engineering Techniques
Systems using Software Agents (or Multi-Agent Systems, MAS) are becoming more popular within the development mainstream because, as the name suggests, an Agent aims to handle task...
Chia-En Lin, Krishna M. Kavi, Frederick T. Sheldon...
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband