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FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
14 years 4 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos
ISQED
2007
IEEE
109views Hardware» more  ISQED 2007»
14 years 4 months ago
Virtual Channels Planning for Networks-on-Chip
The virtual channel flow control (VCFC) provides an efficient implementation for on-chip networks. However, allocating the virtual channels (VCs) uniformly results in a waste of a...
Ting-Chun Huang, Ümit Y. Ogras, Radu Marcules...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
14 years 4 months ago
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault d...
Paolo Bernardi, Ernesto Sánchez, Massimilia...
ISLPED
1998
ACM
86views Hardware» more  ISLPED 1998»
14 years 2 months ago
The energy complexity of register files
Register files (RF) represent a substantial portion of the energy budget in modern processors, and are growing rapidly with the trend towards wider instruction issue. The actual ...
Victor V. Zyuban, Peter M. Kogge
ISLPED
1996
ACM
101views Hardware» more  ISLPED 1996»
14 years 2 months ago
High-level power estimation
The growing demand for portable electronic devices has led to an increased emphasis on power consumption within the semiconductor industry. As a result, designers are now encourag...
Paul E. Landman