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CODES
2003
IEEE
14 years 1 months ago
Schedule-aware performance estimation of communication architecture for efficient design space exploration
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Sungchan Kim, Chaeseok Im, Soonhoi Ha
DATE
2005
IEEE
144views Hardware» more  DATE 2005»
14 years 2 months ago
Context Sensitive Performance Analysis of Automotive Applications
Accurate timing analysis is key to efficient embedded system synthesis and integration. While industrial control software systems are developed using graphical models, such as Ma...
Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabia...
ACSD
1998
IEEE
125views Hardware» more  ACSD 1998»
14 years 23 days ago
Hierarchical Concurrent Finite State Machines in Ptolemy
We implement a finite state machine (FSM) domain for specifying and simulating control functionality of a system within the Ptolemy software environment. The FSM domain is success...
Bilung Lee, Edward A. Lee
ICCAD
1998
IEEE
120views Hardware» more  ICCAD 1998»
14 years 23 days ago
Communication synthesis for distributed embedded systems
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
Ross B. Ortega, Gaetano Borriello
ENTCS
2007
101views more  ENTCS 2007»
13 years 8 months ago
Parametric Performance Contracts: Non-Markovian Loop Modelling and an Experimental Evaluation
Even with todays hardware improvements, performance problems are still common in many software systems. An approach to tackle this problem for component-based software architectur...
Heiko Koziolek, Viktoria Firus