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TCAD
2010
105views more  TCAD 2010»
13 years 2 months ago
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Adán Kohler, Gert Schley, Martin Radetzki
ISCA
2005
IEEE
79views Hardware» more  ISCA 2005»
14 years 1 months ago
Design and Evaluation of Hybrid Fault-Detection Systems
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Up to now, system designers have prim...
George A. Reis, Jonathan Chang, Neil Vachharajani,...
HPCA
2007
IEEE
14 years 8 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
ICPADS
2006
IEEE
14 years 1 months ago
Fast Convergence in Self-Stabilizing Wireless Networks
The advent of large scale multi-hop wireless networks highlights problems of fault tolerance and scale in distributed system, motivating designs that autonomously recover from tra...
Nathalie Mitton, Eric Fleury, Isabelle Guér...
VTS
1998
IEEE
87views Hardware» more  VTS 1998»
13 years 11 months ago
Fast Self-Recovering Controllers
A fast fault-tolerant controller structure is presented, which is capable of recovering from transient faults by performing a rollback operation in hardware. The proposed fault-to...
Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wu...