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DAC
2002
ACM
14 years 8 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
DATE
2007
IEEE
148views Hardware» more  DATE 2007»
14 years 1 months ago
Temperature aware task scheduling in MPSoCs
In deep submicron circuits, elevation in temperatures has brought new challenges in reliability, timing, performance, cooling costs and leakage power. Conventional thermal managem...
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Keith...
DATE
2008
IEEE
119views Hardware» more  DATE 2008»
14 years 1 months ago
Process Variation Aware Issue Queue Design
In sub-90nm process technology it becomes harder to control the fabrication process, which in turn causes variations between the design-time parameters and the fabricated paramete...
Raghavendra K, Madhu Mutyam
EOR
2007
96views more  EOR 2007»
13 years 7 months ago
A fast method for discovering critical edge sequences in e-commerce catalogs
Web sites allow the collection of vast amounts of navigational data – clickstreams of user traversals through the site. These massive data stores offer the tantalizing possibil...
Kaushik Dutta, Debra E. VanderMeer, Anindya Datta,...
AES
2000
Springer
117views Cryptology» more  AES 2000»
13 years 12 months ago
A Comparison of AES Candidates on the Alpha 21264
We compare the five candidates for the Advanced Encryption Standard based on their performance on the Alpha 21264, a 64-bit superscalar processor. There are several new features o...
Richard Weiss, Nathan L. Binkert