4116 search results - page 119 / 824 » Type Analysis for CHIP |
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper we present new approaches to high performance protein database scanning on two novel massively parallel architectures to gain supercomputer power at low cost. The ï¬...
ICCAD
2000
IEEE
14 years 1 months ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
ASPDAC
2007
ACM
14 years 27 days ago
2007
ACM
With semiconductor fabrication technologies scaled below 100 nm, the design-manufacturing interface becomes more and more complicated. The resultant process variability causes a nu...
FMCAD
2008
Springer
13 years 10 months ago
2008
Springer
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
ASPDAC
2010
ACM
13 years 7 months ago
2010
ACM
Abstract-- Optimizing blocks in a System-on-Chip (SoC) circuit is becoming more and more important nowadays due to the use of third-party Intellectual Properties (IPs) and reused d...