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DATE
2004
IEEE
158views Hardware» more  DATE 2004»
14 years 10 days ago
Communication Analysis for System-On-Chip Design
In this paper we present an approach for analysis of systems of parallel, communicating processes for SoC design. We present a method to detect communications that synchronize the...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...
NOCS
2008
IEEE
14 years 3 months ago
Real-Time Communication Analysis for On-Chip Networks with Wormhole Switching
Abstract— In this paper, we discuss a real-time on-chip communication service with a priority-based wormhole switching policy. A novel off-line schedulability analysis approach i...
Zheng Shi, Alan Burns
BMCBI
2010
154views more  BMCBI 2010»
13 years 8 months ago
Motif Enrichment Analysis: a unified framework and an evaluation on ChIP data
Background: A major goal of molecular biology is determining the mechanisms that control the transcription of genes. Motif Enrichment Analysis (MEA) seeks to determine which DNA-b...
Robert C. McLeay, Timothy L. Bailey
DAC
2007
ACM
14 years 9 months ago
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
Tao Li, Zhiping Yu
ASPDAC
2009
ACM
135views Hardware» more  ASPDAC 2009»
14 years 3 months ago
Analysis of communication delay bounds for network on chips
—In network-on-chip, computing worst-case delay bound for packet delivery is crucial for designing predictable systems but yet an intractable problem due to complicated resource ...
Yue Qian, Zhonghai Lu, Wenhua Dou