Sciweavers

192 search results - page 30 / 39
» Ultrafast Algorithm for Designing Focused Combinational Arra...
Sort
View
DATE
2005
IEEE
88views Hardware» more  DATE 2005»
14 years 1 months ago
System Synthesis for Networks of Programmable Blocks
The advent of sensor networks presents untapped opportunities for synthesis. We examine the problem of synthesis of behavioral specifications into networks of programmable sensor ...
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank ...
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 4 months ago
State re-encoding for peak current minimization
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
Shih-Hsu Huang, Chia-Ming Chang, Yow-Tyng Nieh
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
DATE
2009
IEEE
89views Hardware» more  DATE 2009»
14 years 2 months ago
Robust non-preemptive hard real-time scheduling for clustered multicore platforms
—Scheduling task graphs under hard (end-to-end) timing constraints is an extensively studied NP-hard problem of critical importance for predictable software mapping on Multiproce...
Michele Lombardi, Michela Milano, Luca Benini
ARITH
2005
IEEE
13 years 10 months ago
Quasi-Pipelined Hash Circuits
Hash functions are an important cryptographic primitive. They are used to obtain a fixed-size fingerprint, or hash value, of an arbitrary long message. We focus particularly on ...
Marco Macchetti, Luigi Dadda