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» Uncertainty Reduction Using Dynamics
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CODES
2003
IEEE
15 years 7 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
VLSID
2009
IEEE
99views VLSI» more  VLSID 2009»
16 years 3 months ago
Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips
In this paper, we present a dynamic power management technique for optimizing the use of virtual channels in network on chips. The technique which is called dynamic virtual channe...
Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afz...
DATE
2005
IEEE
129views Hardware» more  DATE 2005»
15 years 8 months ago
Exploiting Dynamic Workload Variation in Low Energy Preemptive Task Scheduling
A novel energy reduction strategy to maximally exploit the dynamic workload variation is proposed for the offline voltage scheduling of preemptive systems. The idea is to construc...
Lap-Fai Leung, Chi-Ying Tsui, Xiaobo Sharon Hu
CASES
2007
ACM
15 years 6 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
126
Voted
TIP
2008
134views more  TIP 2008»
15 years 2 months ago
Higher Order SVD Analysis for Dynamic Texture Synthesis
Videos representing flames, water, smoke, etc. are often defined as dynamic textures: "textures" because they are characterized by redundant repetition of a pattern and &...
Roberto Costantini, Luciano Sbaiz, Sabine Süs...