1052 search results - page 103 / 211 » Understanding POWER multiprocessors |
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
It has been shown that many requests miss in all remote nodes in shared memory multiprocessors. We are motivated by the observation that this behavior extends to much coarser grai...
GLVLSI
2010
IEEE
14 years 2 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
PVM
1997
Springer
14 years 1 months ago
1997
Springer
The extremely low latencies and high bandwidth results achievable with the Scalable Coherent Interface SCI at lowest level encourages its integration into existing Message Passin...
EUROPAR
2009
Springer
14 years 28 days ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
HIPEAC
2009
Springer
14 years 8 days ago
2009
Springer
Shrinking process technologies and growing chip sizes have profound effects on process variation. This leads to Chip Multiprocessors (CMPs) where not all cores operate at maximum f...