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GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
14 years 2 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
MOBIHOC
2008
ACM
14 years 7 months ago
Complexity in wireless scheduling: impact and tradeoffs
It has been an important research topic since 1992 to maximize stability region in constrained queueing systems, which includes the study of scheduling over wireless ad hoc networ...
Yung Yi, Alexandre Proutiere, Mung Chiang
INFOCOM
2007
IEEE
14 years 1 months ago
Optimal Provisioning of Elastic Service Availability
Abstract— Service availability is one of the most closely scrutinized metrics in offering network services. It is important to costeffectively provision a managed and differentia...
Dahai Xu, Ying Li, Mung Chiang, A. Robert Calderba...
INFOCOM
2006
IEEE
14 years 1 months ago
Cross-Layer Congestion Control, Routing and Scheduling Design in Ad Hoc Wireless Networks
Abstract— This paper considers jointly optimal design of crosslayer congestion control, routing and scheduling for ad hoc wireless networks. We first formulate the rate constrai...
Lijun Chen, Steven H. Low, Mung Chiang, John C. Do...
DATE
2010
IEEE
113views Hardware» more  DATE 2010»
14 years 20 days ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang