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ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 11 months ago
MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
SIGSOFT
2010
ACM
13 years 5 months ago
Staged concurrent program analysis
Concurrent program verification is challenging because it involves exploring a large number of possible thread interleavings together with complex sequential reasoning. As a resul...
Nishant Sinha, Chao Wang
DAC
2003
ACM
14 years 8 months ago
An IDF-based trace transformation method for communication refinement
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
Andy D. Pimentel, Cagkan Erbas
P2P
2003
IEEE
130views Communications» more  P2P 2003»
14 years 24 days ago
Peer-to-Peer Wireless LAN Consortia: Economic Modeling and Architecture
Abstract—In this paper we explore the incentive and architectural issues that arise in Consortia of Peer-to-Peer Wireless Local Area Networks. A P2P WLAN Consortium (PWC) is a co...
Panayotis Antoniadis, Costas Courcoubetis, Elias C...
CODES
2006
IEEE
13 years 9 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...