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» Use of local biasing in designing analog integrated circuits
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ICPR
2004
IEEE
14 years 8 months ago
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers
Parallel processors such as SIMD computers have been successfully used in various areas of high performance image and data processing. Due to their characteristics of highly regula...
Jie Han, Pieter Jonker
DAC
2010
ACM
13 years 7 months ago
QuickYield: an efficient global-search based parametric yield estimation with performance constraints
With technology scaling down to 90nm and below, many yield-driven design and optimization methodologies have been proposed to cope with the prominent process variation and to incr...
Fang Gong, Hao Yu, Yiyu Shi, Daesoo Kim, Junyan Re...
ISPD
2004
ACM
150views Hardware» more  ISPD 2004»
14 years 1 months ago
Topology optimization of structured power/ground networks
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
Jaskirat Singh, Sachin S. Sapatnekar
ICCAD
2004
IEEE
138views Hardware» more  ICCAD 2004»
14 years 4 months ago
A thermal-driven floorplanning algorithm for 3D ICs
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
Jason Cong, Jie Wei, Yan Zhang
ISLPED
2003
ACM
129views Hardware» more  ISLPED 2003»
14 years 27 days ago
A critical analysis of application-adaptive multiple clock processors
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
Emil Talpes, Diana Marculescu