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» Using SAT-based techniques in power estimation
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DAC
1997
ACM
14 years 5 hour ago
Power Macromodeling for High Level Power Estimation
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...
Subodh Gupta, Farid N. Najm
TCAD
1998
127views more  TCAD 1998»
13 years 7 months ago
Gate-level power estimation using tagged probabilistic simulation
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
Chih-Shun Ding, Chi-Ying Tsui, Massoud Pedram
DAC
2005
ACM
14 years 8 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
VLSID
2001
IEEE
132views VLSI» more  VLSID 2001»
14 years 8 months ago
Accurate Power Macro-modeling Techniques for Complex RTL Circuits
This paper presents novel techniques for the cycle-accurate power macro-modeling of complex RTL components. The proposed techniques are based on the observation that RTL component...
Nachiketh R. Potlapally, Michael S. Hsiao, Anand R...
FDTC
2009
Springer
100views Cryptology» more  FDTC 2009»
14 years 2 months ago
Using Optical Emission Analysis for Estimating Contribution to Power Analysis
—This paper shows that optical emissions from an operating chip have a good correlation with power traces and can therefore be used to estimate the contribution of different area...
Sergei P. Skorobogatov