54 search results - page 7 / 11 » Using a Swap Instruction to Coalesce Loads and Stores |
DSD
2009
IEEE
14 years 2 months ago
2009
IEEE
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
HPCA
2004
IEEE
14 years 7 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
ISLPED
2003
ACM
14 years 19 days ago
2003
ACM
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
ISCA
2008
IEEE
13 years 7 months ago
2008
IEEE
Dynamic information flow tracking (also known as taint tracking) is an appealing approach to combat various security attacks. However, the performance of applications can severely...
ICCS
2003
Springer
14 years 18 days ago
2003
Springer
Memory traces record the addresses touched by a program during its execution, enabling many useful investigations for understanding and predicting program performance. But complete...