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» Using embedded FPGAs for SoC yield improvement
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DATE
2009
IEEE
229views Hardware» more  DATE 2009»
14 years 2 months ago
Health-care electronics The market, the challenges, the progress
— Exploding health care demands and costs of aging and stressed populations necessitate the use of more in-home monitoring and personalized health care. Electronics hold great pr...
Wolfgang Eberle, Ashwin S. Mecheri, Thi Kim Thoa N...
DAC
2004
ACM
14 years 25 days ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
CVPR
2010
IEEE
14 years 1 months ago
Pushing the Envelope of Modern Methods for Bundle Adjustment
In this paper, we present results and experiments with several methods for bundle adjustment, producing the fastest bundle adjuster ever published. The fastest methods work with t...
Yekeun Jeong, David Nister, Drew Steedly, Richard ...
ICMCS
2006
IEEE
128views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Image Watermarking based on Genetic Algorithm
In order to improve the robustness and imperceptibleness of the image spread spectrum watermark algorithm, a new approach for optimization in 8×8 DCT domain using genetic algorit...
Zhicheng Wei, Hao Li, Jufeng Dai, Sashuang Wang
JSA
2008
94views more  JSA 2008»
13 years 7 months ago
Energy reduction through crosstalk avoidance coding in networks on chip
Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near fut...
Partha Pratim Pande, Amlan Ganguly, Haibo Zhu, Cri...