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DATE
2005
IEEE
121views Hardware» more  DATE 2005»
14 years 29 days ago
Joint Power Management of Memory and Disk
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
Le Cai, Yung-Hsiang Lu
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
13 years 11 months ago
Cache-Aware Scratchpad Allocation Algorithm
In the context of portable embedded systems, reducing energy is one of the prime objectives. Most high-end embedded microprocessors include onchip instruction and data caches, alo...
Manish Verma, Lars Wehmeyer, Peter Marwedel
RTSS
2007
IEEE
14 years 1 months ago
Integrating Adaptive Components: An Emerging Challenge in Performance-Adaptive Systems and a Server Farm Case-Study
The increased complexity of performance-sensitive software systems leads to increased use of automated adaptation policies in lieu of manual performance tuning. Composition of ada...
Jin Heo, Dan Henriksson, Xue Liu, Tarek F. Abdelza...
HPCA
2005
IEEE
14 years 7 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
ISCA
2009
IEEE
180views Hardware» more  ISCA 2009»
14 years 2 months ago
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices
The widespread use of multicore processors has dramatically increased the demands on high bandwidth and large capacity from memory systems. In a conventional DDR2/DDR3 DRAM memory...
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zh...