428 search results - page 11 / 86 » Validating High-Level Synthesis |
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
Importance of addressing soft errors in both safety critical applications and commercial consumer products is increasing, mainly due to ever shrinking geometries, higher-density c...
DATE
2003
IEEE
14 years 3 months ago
2003
IEEE
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
ISSS
2000
IEEE
14 years 2 months ago
2000
IEEE
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
VLSID
2009
IEEE
14 years 10 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
ISSS
2002
IEEE
14 years 2 months ago
2002
IEEE
We introduce a new approach, “Dynamic Common Sub-expression Elimination (CSE)”, that dynamically eliminates common sub- expressions based on new opportunities created during s...